Title: "Hybrid system modelling of networked control systems implemented on WirelessHART networks" Expositor: Sr. Alejandro Maass, Exalumno de Ing. Civil Electrónica y Magíster en Cs. Ing. Electrónica. Día: Jueves 14 de Enero, 10.00 hrs. Lugar: Auditorio "Guillermo Feick", B-221.
Abstract: Network control systems (NCSs) are systems where the communication between plant and controller takes place over non-transparent communication links. Several results already exist in the literature for linear NCS regarding specific communication problems such as packet drops, delays, data rates, quantization, etc. Control-oriented analysis and design is still missing when studying real life networks such as FlexRay, CAN, Zigbee, WirelessHART, in which, apart from the above, issues like scheduling, routing and traffic need to be addressed too. We use a Hybrid System formalism to obtain a control-oriented model for non-linear NCSs implemented over a WirelessHART network. This model allow us to obtain stability results for source routing configurations and poses an interesting new problem to address for graph routing configurations.
Bio: Alejandro I. Maass was born in Santiago, Chile. He obtained the Electronic Engineering degree and the M.Sc. degree in Electronic Engineering from the Universidad Técnica Federico Santa María, Valparaíso, Chile in 2013. During 2014 he was a research assistant at the Department of Electronic Engineering in the same university. In 2015 he joined the Department of Electrical and Electronic Engineering at The University of Melbourne, Melbourne, Australia, where he is currently pursuing a Ph.D. degree. His research interests include Network Control Systems, Nonlinear Systems and Optimal Control.
Resumen Charla: Los data centers actuales están, en su mayoría, diseñados según la topología 3-Tier fat-tree con varias jerarquías que involucran conmutadores electrónicos. Estos últimos imponen limitaciones en cuanto a velocidad de transmisión de datos y consumo de energía, las que crecen considerablemente con el aumento de jerarquías y terminales conectados. Esta charla pasa por las principales soluciones propuestas en la literatura para el remplazo de conmutadores electrónicos por conmutadores ópticos y defiende las arquitecturas basadas en TWIN (Time-Domain-Wavelength-Interleaved Networks). En particular, se demuestra que la arquitectura denominada POPI (Passive-Optical-Pod Interconnect) [Indre 2014] es la más adaptada para data centers mono sitio a pequeña escala. Se analizan sus limitaciones y se proponen posibles soluciones para aumentar el máximo número de terminales conectados, siendo este último su principal limitación.
Jueves 7 de enero de 2016
14:30 hrs., Auditorio de Electrónica (B-221) Departamento de Electrónica
Alumno: ERNESTO ALEJANDRO FREDES ZARRICUETA Opta al Título y Grado de: Ingeniero Civil Electrónico y Magíster en Ciencias de la Ingeniería Electrónica, mención Computadores Título Tesis: "Sistema de Navegación Asistida Basado en la Estimación de Riesgos de Colisión utilizando Sensores de Profundidad" Comisión: Dr. Fernando Auat, Director de Tesis Dr. Marcos Zúñiga, Profesor Dpto. Electrónica Dr. Miguel Torres, Examinador externo, P. Universidad Católica de Chile Fecha y hora: Viernes 18 de diciembre 2015, 11:30 hrs. Lugar: Auditorio "Guillermo Feick" (B.221)
Se hace una cordial invitación a la charla: Optimal input design for nonlinear dynamical systems: a graph-theory approach, a dictar por el exalumno Sr. Patricio Valenzuela; para el día Jueves 17 de diciembre, a las 14.00 hrs., en el Auditorio "Guillermo Feick", B-221
Abstract: Optimal input design concerns the design of an input sequence to maximize the information retrieved from an experiment. The design of the input sequence is performed by optimizing a cost function related to the intended model application. Several approaches to input design have been proposed, with results mainly on linear models. Under the linear assumption of the model structure, the input design problem can be solved in the frequency domain, where the corresponding spectrum is optimized subject to power constraints. However, the optimization of the input spectrum using frequency domain techniques cannot include time-domain amplitude constraints, which could arise due to practical or safety reasons. In this talk, a new input design method for nonlinear models is introduced. The method considers the optimization of an input sequence as a realization of the stationary Markov process with finite memory. Assuming a finite set of possible values for the input, the feasible set of stationary processes can be described using graph theory, where de Bruijn graphs can be employed to describe the process. By using de Bruijn graphs, we can express any element in the set of stationary processes as a convex combination of the measures associated with the extreme points of the set. Therefore, by a suitable choice of the cost function, the resulting optimization problem is convex even for nonlinear models. In addition, since the input is restricted to a finite set of values, the proposed input design method can naturally handle amplitude constraints. Some applications of the proposed technique are presented to illustrate the discussion.
Patricio E. Valenzuela was born in Santiago, Chile in 1986. He obtained the electronics engineering title and M.S. degree in electronics engineering from the Universidad Técnica Federico Santa María, Valparaíso, Chile in 2011. In 2012 he joined the Department of Automatic Control at KTH Royal Institute of Technology, Stockholm, Sweden, where is currently pursuing a Ph.D. degree on Electronic Engineering. His research interests include system identification and control theory.
Se invita a la comunidad universitaria a la charla detallada a continuación, a ser dictada por el Prof. Rama Chellappa, de la Universidad de Maryland, EEUU, en el marco del Proyecto Basal AC3E:
-Título: "Deep Learning Networks for Computer Vision: Blessing or Curse?" -Fecha y hora: Viernes 11 de diciembre, 14:00 hrs -Lugar: Auditorio Guillermo Feick, B-221, Departamento de Electrónica -Expositor: Rama Chellappa, Chair, Department of Electrical and Computer Engineering University of Maryland https://www.umiacs.umd.edu/people/rama
ABSTRACT Over the last five years so, deep learning networks have shown that impressive results can be obtained for several computer vision problems such as face detection, object detection/recognition and face verification. In an ongoing effort on face verification, we have been able to improve performance using deep learning networks, which is both exhilarating and worrisome. While performance improvement using deep learning networks should be seen as a blessing (who can argue against performance), several problems remain to be addressed. For example, reliance on the availability of very large annotated data set may be a handicap. Being able to generalize networks across test data with different distributions (domain adaptation) as well as different problems is also important. Deriving bounds on the number of training sam! ples, gi ven the distance between training and test data distributions will be useful for planning data acquisition/annotation tasks. We will address some of these issues in the talk.
Prof. Rama Chellappa received the B.E. (Hons.) degree in Electronics and Communication Engineering from the University of Madras, India and the M.E. (with Distinction) degree from the Indian Institute of Science, Bangalore, India. He received the M.S.E.E. and Ph.D. Degrees in Electrical Engineering from Purdue University, West Lafayette, IN. During 1981-1991, he was a faculty member in the department of EE-Systems at University of Southern California (USC). Since 1991, he has been a Professor of Electrical and Computer Engineering (ECE) and an affiliate Professor of Computer Science at University of Maryland (UMD), College Park. He is also affiliated with the Center for Automation Research and the Institute for Advanced Computer Studies (Permanent Member) and is serving as the Chair of the ECE department. In 2005, he was named a Minta Martin Professor of Engineering. His current research interests span many areas in image processing, computer vision and pattern recognition. Prof. Chellappa is a recipient of an NSF Presidential Young Investigator Award and four IBM Faculty Development Awards. He received two paper awards and the K.S. Fu Prize from the International Association of Pattern Recognition (IAPR). He is a recipient of the Society, Technical Achievement and Meritorious Service Awards from the IEEE Signal Processing Society. He also received the Technical Achievement and Meritorious Service Awards from the IEEE Computer Society. He is a recipient of Excellence in teaching award from the School of Engineering at USC. At UMD, he received college and university level recognitions for research, teaching, innovation and mentoring undergraduate students. In 2010, he was recognized as an Outstanding ECE by Purdue University. Prof. Chellappa served as the Editor-in-Chief of IEEE Transactions on Pattern Analysis and Machine Intelligence and as the General and Technical Program Chair/Co-Chair for several IEEE international and national conferences and workshops. He is a Golden Core Member of the IEEE Computer Society, served as a Distinguished Lecturer of the IEEE Signal Processing Society and as the President of IEEE Biometrics Council. He is a Fellow of IEEE, IAPR, OSA, AAAS, ACM, AAAI and holds four patents.